avr-libc: <util/delay_basic.h>: Basic busy-wait delay loops

avr-libc 2.1.0 Standard C library for AVR-GCC |

## AVR Libc Home Page |  | ## AVR Libc Development Pages
## Main Page | ## User Manual | ## Library Reference | ## FAQ | ## Example Projects

Loading...
Searching...
No Matches
Functions
<util/delay_basic.h>: Basic busy-wait delay loops

## Functions
void | _delay_loop_1 (uint8_t __count)
void | _delay_loop_2 (uint16_t __count)

## Detailed Description

#include <util/delay_basic.h>
delay_basic.h

The functions in this header file implement simple delay loops that perform a busy-waiting. They are typically used to facilitate short delays in the program execution. They are implemented as count-down loops with a well-known CPU cycle count per loop iteration. As such, no other processing can occur simultaneously. It should be kept in mind that the functions described here do not disable interrupts.

In general, for long delays, the use of hardware timers is much preferrable, as they free the CPU, and allow for concurrent processing of other events while the timer is running. However, in particular for very short delays, the overhead of setting up a hardware timer is too much compared to the overall delay time.

Two inline functions are provided for the actual delay algorithms.

## Function Documentation

## ◆ _delay_loop_1()

void _delay_loop_1 | ( | uint8_t | __count | ) |

Delay loop using an 8-bit counter `__count`, so up to 256 iterations are possible. (The value 256 would have to be passed as 0.) The loop executes three CPU cycles per iteration, not including the overhead the compiler needs to setup the counter register.

Thus, at a CPU speed of 1 MHz, delays of up to 768 microseconds can be achieved.

## ◆ _delay_loop_2()

void _delay_loop_2 | ( | uint16_t | __count | ) |

Delay loop using a 16-bit counter `__count`, so up to 65536 iterations are possible. (The value 65536 would have to be passed as 0.) The loop executes four CPU cycles per iteration, not including the overhead the compiler requires to setup the counter register pair.

Thus, at a CPU speed of 1 MHz, delays of up to about 262.1 milliseconds can be achieved.